This paper presents a novel implementation of the JPEG2000 standard as a system on a chip (SoC). While most of the research\r\nin this field centers on acceleration of the EBCOT Tier I encoder, this work focuses on an embedded solution for EBCOT Tier II.\r\nSpecifically, this paper proposes using an embedded softcore processor to performTier II processing as the back end of an encoding\r\npipeline.TheAlteraNIOS II processor is chosen for the implementation and is coupled with existing embedded processingmodules\r\nto realize a fully embedded JPEG2000 encoder.The design is synthesized on a Stratix IV FPGA and is shown to out perform other\r\ncomparable SoC implementations by 39% in computation time.
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